The present invention relates generally to sinusoidal signal frequency measuring devices and more specifically to digitized sinusoidal signal frequency devices using zero transitions.
Sinusoidal signal frequency measuring devices are generally known in which either the periods of the sinusoidal signal generated are counted within a particular gate time or clock pulses are counted during the periods of the signal generated and are correspondingly evaluated in a signal processing unit for obtaining information on the frequency/rotational speed. An example of such a device is shown in German Patent Specification No. 31 25 197.
In addition, a generic device is known, for example, U.S. Pat. No. 4,363,099, wherein the frequency of a sinusoidal signal, particularly a deviation from the known and largely constant frequency, can be determined without requiring a zero transition determination In this arrangement, a large number of measurements is performed per period of the sinusoidal signal for forming digital valves which are stored and from which the frequency is then determined by linear interpolation and formula relations.
It is the object of the invention to develop a generic device for a high-resolution determination of an unknown frequency or rotational speed of a shaft with the least measurement expenditure.
This and other objects of the invention are achieved by providing a signal processing unit connected to a signal generating unit wherein the signal processing unit includes a signal sampling unit, a comparator or period unit and an evaluation unit. The signal sampling unit includes an adjustable sampling clock frequency oscillator which is set to oscillate at a higher frequency than the expected frequency of the sinusoidal signal, an analog to digital (A/D) converter for sampling, at the sampling clock frequency, the sinusoidal signal generated by the signal generator to provide a digitized value as a sign output and as an absolute valve output. A first digital memory is triggered by sampling clock pulse for storing the absolute value formed during the preceding cycle. A counter is also provided to count sampling clock pulses until reset. The comparator or period unit includes a flip-flop triggered by a transition of the sign output signal from the analog to digital converter from a first to a second sign for providing a transition output pulse J.
The evaluation unit includes a plurality of arithmatic elements operated in sequence. A first adder, triggered by the transition output signal J, adds the previous absolute value from the first digital memory with the present absolute value from the A/D converter. A first divider performs a quotient of the sum from the first adder and the previous absolute value from the first digital memory. A second adder adds the output of the first divider with the present count in the counter, which represents the count of the period, and generates a reset signal to reset the counter. A subtractor subtracts the sum output of the second adder from a previous quotient of the first divider which it receives from a second digital memory which is triggered by the transition output pulse J to store the previous quotient from the first divider. A first multiplier multiplies the difference output of the subtractor by a signal-generator-specific product to produce a frequency output signal.
The signal-generator-specific product may be provided to the first multiplier manually as the product of the sampling time T of the sampling frequency set for the oscillator times the number of uniform divisions of the transmitter of the signal generator or may be calculated by a second multiplier which receives the sampling period T of the sampling frequency from the isolator and multiplies it times a manually inputted number of divisions of the transmitter of the signal generator. A second divider may be provided on the output of the first multiplier to divide the output by 60 so as to convert the output signal from revolutions per second to revolutions per minute. Once the first adder is activated by the transition output pulse J, the remainder of the arithmatic devices are activated upon receiving a completion signal from the previous element or stage.
Thus, for example, conclusions with respect to the condition of an internal combustion engine, can be drawn from the high-resolution rotational speed information by suitable analysis. For example, information on the torque can be obtained from the changes in rotational speed during one or more operating cycles, even in non-steady-state operation. By combining these information items with other signals sampled at the same time, conclusions can be drawn with respect to error sources, for example in the workshop area or in production control. Since in addition, analogous measurement values are registered during the other measurement value recordings taken on the engine and on the vehicle, this device can be advantageously integrated into the existing recording systems.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.